Programmable logic devices such as FPGAs have wide applicability due to their flexibility and reprogrammability. An FPGA typically includes an array of configurable logic blocks (CLBs) programmably interconnected to one another across a configurable routing structure to implement a user's desired logic functions and circuit design. FPGAs also include a number of configuration memory cells coupled to the CLBs to specify the function to be performed by each CLB, and a number of configuration memory cells coupled to the configurable routing structure to specify the connectivity between CLBs. FPGAs may also include data storage cells accessible by a user during device operation.
FPGAs are most commonly used within systems including a microprocessor or similar control device and a memory unit. Referring to FIG. 1, an available FPGA 120 receives a configuration bitstream from memory device 100 upon receipt of a PROGRAM signal from microprocessor 110, causing the FPGA to erase its now-unwanted configuration data and prepare to receive new configuration data from memory 100. Thus, while reconfiguring an FPGA within a controlled system to perform different logic functions at different times is known in the art, conventional reconfiguration techniques require fairly sophisticated and expensive control devices, such as microprocessor 110, to instigate reconfiguration as needed for a particular system. There remains, therefore, a need in the art for a system capable of reconfiguring an FPGA without a sophisticated control device.